CISSOID delivers first SiC Intelligent Power Modules to Thales
CISSOID, the leader in high-temperature and extended lifetime semiconductor solutions, announces the delivery of the first prototypes of a 3-phase 1200V/100A SiC MOSFET Intelligent Power Modules (IPM) to Thales Avionics Electrical Systems. This module, developed with the support of Clean Sky Joint Undertaking, will help increasing power converters density, by decreasing weight and size,
for power generation and electromechanical actuators in More-Electrical Aircrafts.
This IPM offers an optimal integration of the gate driver with power transistors together in order to take advantage of the full benefits of Silicon Carbide (SiC), i.e. low switching losses and high operating temperature. Leveraging on HADES2® Isolated Gate Driver that incorporates years of development in driving SiC transistors, it combines advanced packaging technologies enabling a reliable operation of power modules in extreme conditions.
For this Aerospace module, a 3-phase power inverter topology was selected while other topologies are being investigated for HEV and Railways projects. In this 3-phase topology, each of the 6 switch positions includes a 100A SiC MOSFET transistor and a 100A SiC Schottky free-wheeling diode. These devices can block voltages up to 1200V, which provide enough headroom against over-voltages in a 540V Aerospace DC bus, and the module is designed to be easily upgraded with 1700V/150A SiC devices. The transistors have a typical On resistance of 12.5mOhms or 8.5mOhms depending on their current rating, either 100A or 150A.
Special care was put on thermal aspects during the design of the module. First, all the materials have been selected to allow reliable operation at high junction temperatures, up to 200°C with peaks at 225°C, in order to decrease cooling requirements. This materials selection also enables high case and storage temperatures, up to 150°C. Finally, the module is based on high-performance materials such as AlSiC baseplate, AlN substrates and Silver Sintering in order to offer near perfect CTE matching with SiC devices and high robustness against thermal and power cycling.
Co-designing the gate driver with the power module in a single IPM allowed CISSOID to optimize the gate driver circuit taking into account parasitic inductances of the power module while minimizing them when possible. Minimizing parasitic inductances allows to switch SiC transistors faster and to lower switching losses. An IPM also offers a plug-and-play solution to power electronic designers who save a lot of time in the design of the gate driver board, which is particulary challenging with SiC transistors. They can then focus on the design of high density power converters taking advantage of SiC.